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Espressif Systems /ESP32-P4 /HP_SYS /L2_MEM_INT_RAW

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Interpret as L2_MEM_INT_RAW

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (REG_L2_MEM_ECC_ERR_INT_RAW)REG_L2_MEM_ECC_ERR_INT_RAW 0 (REG_L2_MEM_EXCEED_ADDR_INT_RAW)REG_L2_MEM_EXCEED_ADDR_INT_RAW 0 (REG_L2_MEM_ERR_RESP_INT_RAW)REG_L2_MEM_ERR_RESP_INT_RAW

Description

NA

Fields

REG_L2_MEM_ECC_ERR_INT_RAW

intr triggered when two bit error detected and corrected from ecc
REG_L2_MEM_EXCEED_ADDR_INT_RAW

intr triggered when access addr exceeds 0xff9ffff at bypass mode or exceeds 0xff80000 at l2cache 128kb mode or exceeds 0xff60000 at l2cache 256kb mode
REG_L2_MEM_ERR_RESP_INT_RAW

intr triggered when err response occurs

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data